Academic Institution Harvard University Known Good Dies 16nm SoC with A53 and eFPGA for flexible acceleration A 25mm2 SoC in 16nm FinFET technology targeting flexible acceleration of compute intensive kernels in DNN, DSP and security algorithms. The SoC includes an always-on sub-system, a dual-core Arm A53 CPU cluster, an embedded FPGA array, and a quad-core cache-coherent accelerator cluster. Measu… Read More → Country United States of America (the) 0 Members 0 Projects 0 Articles Contributor since 21 Jan 2022 - 16:57 Actions
16nm SoC with A53 and eFPGA for flexible acceleration A 25mm2 SoC in 16nm FinFET technology targeting flexible acceleration of compute intensive kernels in DNN, DSP and security algorithms. The SoC includes an always-on sub-system, a dual-core Arm A53 CPU cluster, an embedded FPGA array, and a quad-core cache-coherent accelerator cluster. Measu… Read More →
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Contributor since 21 Jan 2022 - 16:57