Cortex-A Series
The Arm Cortex-A series is a class of application processors that implement a Virtual Memory System Architecture (VMSA) that enable Operating Systems such as Linux to support the operation of multiple software applications.
The specific processor may support multiple levels of execution, separating applications usually running unprivileged and operating system functions running in privileged modes allowing the protection of the system from malfunctioning applications. The operating system manages the allocation of system resources.
The series of processors conforms to one of the specific Arm architectures either Armv7-A and Armv8-A (later architectures are not part of the Arm Academic Access program).
Projects Using This Technology
megaSoC
Reference Design Comparison Table
This table will let you compare this reference design with others on SoC Labs| Title | megaSoC | milliSoC |
|---|---|---|
| Class | Complex | Mid-range |
| Reference Design | MegaSoC | TSRI/SoC Labs |
| Staffing | Academic team | Academic + dedicated post doc |
| Time Scales | 6 months to 1 year | 1+ years |
| Model Forms | Trial of processing element | |
| Tape Out / Package and Board Costs | >£50k | £25k-£50k |
| Processor(s) | A53 | M55/U55 |
| Processor(s) (speed) | > 800 Mhz | 250-800Mhz |
| Data Rates / On Chip Comms | <2.5 Gbps | 10-80 Gbps |
| Data Rates / Off Chip Comms | <50 Mbps | 0.1-0.8 Gbps |
| On Chip Memory Requirements | 32KB to multiple MB | 2MB+ |
| Virtual Prototype Environment | HAPS | MPS3 |
| Tape Out Node | 28nm | 28nm |
Related Projects and Workflows
This section details the following: the core reference design, the initial project that led to the definition of the reference design, and any additional projects that extend the reference design for new or additional applications. It also defines the related example workflows for the front end Architectural and Behavioural design stages, and the back end Logical and Physical design stages. Front end Behavioural design are usually accomplished with FPGA environments and tool chains, back end Physical design requires technology specific design rules and EDA tool suites.